With increasing processing speed of digital signals in modern circuits, the effect of noise on these signals becomes more problematic. This problem is further exacerbated when a number of digital circuits connect to a single bus and receive the same signal.
Many techniques have been employed to reduce noise sensitivity of such circuits. Foremost among these techniques is to sample data at a time when the data is expected to be stable. In signals where the information content is coincident with the edge of the waveform, such as a strobe and clock signal (e.g., signals that are used to clock state machines), this sampling technique is, however, not suitable; in this situation a xe2x80x9cglitchxe2x80x9d can cause a significant problem. A xe2x80x9cglitchxe2x80x9d is a short pulse or noise spike to which circuit response is not desired.
One technique for reducing circuit sensitivity to glitch noise is to utilize a voltage-based xe2x80x9cdeglitchxe2x80x9d filter (also known as a hysteresis deglitch filter). Receivers with voltage-based deglitch filters essentially have two voltage thresholds coincident with a rising-edge and a falling-edge representing low and high circuit states. When a signal rises above the rising-edge threshold, the circuit changes state; when the signal drops below the falling-edge threshold, the circuit again changes state.
The voltage difference between voltage thresholds is known as the input hysteresis. The voltage-based deglitch filter resists noise when the noise is lower in magnitude than the amount of input hysteresis. Typically, in a bus system with multiple receiving circuits, the difference between voltage high and low thresholds is reduced, thereby reducing the amount of input hysteresis. The amount of hysteresis may not exceed the difference in the worst case signal to be received. Voltage-based deglitch filters are typically used for strobe and clock signals; however, if the noise level increases above the amount of hysteresis, glitches still occur in the receiving circuit.
Another technique for reducing sensitivity of digital signals to glitch noise is to design the circuit to respond only to input pulses that exceed a predetermined minimum pulse width, thereby ignoring pulses of lesser duration. This technique is utilized within a xe2x80x9ctiming-basedxe2x80x9d deglitch filter. Typically, the timing-based deglitch filter has a timer that is started when a first transition in the input signal is detected. If a second transition occurs before the timer expires, both the first and second transitions are ignored, thus removing the glitch. If the timer expires before the second transition occurs, the filter output transitions, thereby passing signal pulses through the filter. Thus, any transition must be present at the input longer than the periodicity of the timer. For correct operation, the predetermined minimum pulse width must be greater than the width of any encountered glitch, and less than the pulse width of any valid signal. This deglitch technique is typically used with clock signals where the clock high and low periods are much longer than the duration of any one glitch. A similar timing-based deglitch technique reduces sensitivity of digital signals to glitch noise by passing a first edge of the digital signal and suppressing subsequent edges for a time period set by a delay line duration. However, in either type of timing-based deglitch technique, as the data rate of digital signals increases, the glitch duration often matches or exceeds the duration of the clock and strobe signal pulse, in which case the glitch is not removed.
Voltage-based and timing-based deglitch filters may be used separately or in series. When used serially, the voltage-based deglitch filter is concatenated with the timing-based deglitch filter and both filters operate independently of one another. Accordingly, a signal used to select the threshold voltage in the voltage-based deglitch filter is taken directly from the output of the voltage-based deglitch filter. The output of the voltage-based deglitch filter is then input to the timing-based filter. The timing-based deglitch filter thereby has no direct influence over the voltage-based deglitch filter. While this concatenation of voltage-based and timing-based deglitch filters may improve signal quality for certain types of glitch noise, it is not sufficient to remove glitch noise for modern high frequency bus signals.
For example, U.S. Pat. No. 5,341,033 (the ""033 patent) describes a deglitch circuit using a hysteresis buffer with two levels of hysteresis and a timer. When the hysteresis buffer detects a transition, the timer is triggered. The timer is in feedback with the hysteresis buffer to increase the buffer""s hysteresis, thereby ignoring glitches until the timer expires. The circuit of the ""033 patent is a first-edge pass (timing-based) noise protection circuit with hysteresis. It is more suited to input signals with short duration glitches (i.e., glitches close to the active edge of the input signal). The ""033 patent is incorporated herein by reference.
In various embodiments, a system removes glitch noise from a signal. The system includes a voltage-based deglitch filter and a timing-based filter. The signal is input to the voltage-based deglitch filter, filtered through the voltage-based and timing-based filters, and output from the timing-based filter. The output from the timing-based filter is also input to the voltage-based filter in feedback to provide enhanced filtering of the glitch noise.
In certain embodiments, a method filters glitch noise from a signal. A voltage-based deglitch filter is concatenated with a liming-based deglitch filter. A feedback is enabled from an output of the timing-based deglitch filter to an input to the voltage-based deglitch filter. The signal is also input to the input of the voltage-based deglitch filter; it is then filtered when processed by both the voltage-based deglitch filter and the timing-based deglitch filter.
In various embodiments, the step of filtering includes the steps of (a) communicating the glitch noise from the voltage-based deglitch filter to the timing-based deglitch filter within the logical signal when the noise glitch exceeds an input hysteresis of the voltage-based deglitch filter and (b) removing the glitch noise from the logical signal within the timing-based deglitch filter when the glitch noise from the logical signal has a width that is less than a predetermined signal delay duration within the timing-based deglitch filter.